Changeset 1559 for DCWoRMS/branches/coolemall/example/airflowEstimation_result/Stats_Simulation_1_ResourceOccupancy.txt
- Timestamp:
- 02/01/16 16:18:33 (9 years ago)
- File:
-
- 1 edited
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DCWoRMS/branches/coolemall/example/airflowEstimation_result/Stats_Simulation_1_ResourceOccupancy.txt
r1476 r1559 3 3 utlization;rack_1;1225670400000;0.298; 4 4 utlization;rack_1;1225674000000;0.274; 5 utlization;rack_1;1225675800000;0.3 1;6 utlization;rack_1;1225676400000;0.3 33;7 utlization;rack_1;1225677600000;0.3 33;8 utlization;rack_1;1225678400000;0.4 05;9 utlization;rack_1;1225679000000;0.4 4;10 utlization;rack_1;1225681200000;0.3 57;5 utlization;rack_1;1225675800000;0.321; 6 utlization;rack_1;1225676400000;0.345; 7 utlization;rack_1;1225677600000;0.345; 8 utlization;rack_1;1225678400000;0.417; 9 utlization;rack_1;1225679000000;0.452; 10 utlization;rack_1;1225681200000;0.369; 11 11 utlization;rack_1;1225683000000;0.345; 12 12 utlization;rack_1;1225684800000;0.286; … … 25 25 utlization;rack_1;1225704200000;0.024; 26 26 utlization;rack_1;1225706400000;0; 27 mean: 0.2 099567099567099527 mean: 0.2121212121212121 28 28 utlization;rack_1/BladeEnclosure_1;1225666800000;0.929; 29 29 utlization;rack_1/BladeEnclosure_1;1225668600000;1; … … 42 42 utlization;rack_1/BladeEnclosure_2;1225668600000;0.214; 43 43 utlization;rack_1/BladeEnclosure_2;1225670400000;0.786; 44 utlization;rack_1/BladeEnclosure_2;1225675800000;0. 857;44 utlization;rack_1/BladeEnclosure_2;1225675800000;0.929; 45 45 utlization;rack_1/BladeEnclosure_2;1225676400000;1; 46 46 utlization;rack_1/BladeEnclosure_2;1225677600000;1; 47 47 utlization;rack_1/BladeEnclosure_2;1225681200000;0.857; 48 utlization;rack_1/BladeEnclosure_2;1225684800000;0.643; 49 utlization;rack_1/BladeEnclosure_2;1225686600000;0.571; 50 utlization;rack_1/BladeEnclosure_2;1225690200000;0.5; 48 utlization;rack_1/BladeEnclosure_2;1225683000000;0.786; 49 utlization;rack_1/BladeEnclosure_2;1225684800000;0.571; 50 utlization;rack_1/BladeEnclosure_2;1225686600000;0.5; 51 utlization;rack_1/BladeEnclosure_2;1225690200000;0.429; 51 52 utlization;rack_1/BladeEnclosure_2;1225690800000;0.357; 52 53 utlization;rack_1/BladeEnclosure_2;1225693800000;0.214; 53 54 utlization;rack_1/BladeEnclosure_2;1225699200000;0.071; 54 55 utlization;rack_1/BladeEnclosure_2;1225706400000;0; 55 mean: 0.4 870129870129869556 mean: 0.474025974025974 56 57 utlization;rack_1/BladeEnclosure_3;1225666800000;0; 57 utlization;rack_1/BladeEnclosure_3;1225678400000;0.429; 58 utlization;rack_1/BladeEnclosure_3;1225679000000;0.643; 59 utlization;rack_1/BladeEnclosure_3;1225685600000;0.571; 60 utlization;rack_1/BladeEnclosure_3;1225686200000;0.5; 61 utlization;rack_1/BladeEnclosure_3;1225689200000;0.429; 62 utlization;rack_1/BladeEnclosure_3;1225689800000;0.357; 58 utlization;rack_1/BladeEnclosure_3;1225676400000;0.071; 59 utlization;rack_1/BladeEnclosure_3;1225678400000;0.5; 60 utlization;rack_1/BladeEnclosure_3;1225679000000;0.714; 61 utlization;rack_1/BladeEnclosure_3;1225685600000;0.643; 62 utlization;rack_1/BladeEnclosure_3;1225686200000;0.571; 63 utlization;rack_1/BladeEnclosure_3;1225689200000;0.5; 64 utlization;rack_1/BladeEnclosure_3;1225689800000;0.429; 65 utlization;rack_1/BladeEnclosure_3;1225690800000;0.357; 63 66 utlization;rack_1/BladeEnclosure_3;1225692800000;0.214; 64 67 utlization;rack_1/BladeEnclosure_3;1225703600000;0.071; 65 68 utlization;rack_1/BladeEnclosure_3;1225704200000;0; 66 69 utlization;rack_1/BladeEnclosure_3;1225706400000;0; 67 mean: 0.2 53246753246753270 mean: 0.2792207792207792 68 71 utlization;rack_1/BladeEnclosure_4;1225666800000;0; 69 72 utlization;rack_1/BladeEnclosure_4;1225706400000;0; … … 101 104 utlization;rack_1/BladeEnclosure_1/Node_6;1225666800000;1; 102 105 utlization;rack_1/BladeEnclosure_1/Node_6;1225677600000;1; 103 utlization;rack_1/BladeEnclosure_1/Node_6;1225684800000;0;104 106 utlization;rack_1/BladeEnclosure_1/Node_6;1225706400000;0; 105 mean: 0.45454545454545453107 mean: 1.0 106 108 utlization;rack_1/BladeEnclosure_1/Node_7;1225666800000;1; 107 109 utlization;rack_1/BladeEnclosure_1/Node_7;1225681200000;0; … … 115 117 utlization;rack_1/BladeEnclosure_1/Node_9;1225674000000;0; 116 118 utlization;rack_1/BladeEnclosure_1/Node_9;1225675800000;1; 117 utlization;rack_1/BladeEnclosure_1/Node_9;122568 6600000;0;119 utlization;rack_1/BladeEnclosure_1/Node_9;1225683000000;0; 118 120 utlization;rack_1/BladeEnclosure_1/Node_9;1225706400000;0; 119 mean: 0. 45454545454545453121 mean: 0.36363636363636365 120 122 utlization;rack_1/BladeEnclosure_1/Node_10;1225666800000;1; 121 123 utlization;rack_1/BladeEnclosure_1/Node_10;1225677600000;1; 124 utlization;rack_1/BladeEnclosure_1/Node_10;1225684800000;0; 122 125 utlization;rack_1/BladeEnclosure_1/Node_10;1225706400000;0; 123 mean: 1.0126 mean: 0.45454545454545453 124 127 utlization;rack_1/BladeEnclosure_1/Node_11;1225666800000;1; 125 128 utlization;rack_1/BladeEnclosure_1/Node_11;1225681200000;0; … … 133 136 utlization;rack_1/BladeEnclosure_1/Node_13;1225674000000;0; 134 137 utlization;rack_1/BladeEnclosure_1/Node_13;1225675800000;1; 135 utlization;rack_1/BladeEnclosure_1/Node_13;122568 3000000;0;138 utlization;rack_1/BladeEnclosure_1/Node_13;1225686600000;0; 136 139 utlization;rack_1/BladeEnclosure_1/Node_13;1225706400000;0; 137 mean: 0. 36363636363636365140 mean: 0.45454545454545453 138 141 utlization;rack_1/BladeEnclosure_1/Node_14;1225666800000;0; 139 142 utlization;rack_1/BladeEnclosure_1/Node_14;1225668600000;1; … … 169 172 utlization;rack_1/BladeEnclosure_2/Node_20;1225670400000;1; 170 173 utlization;rack_1/BladeEnclosure_2/Node_20;1225677600000;1; 171 utlization;rack_1/BladeEnclosure_2/Node_20;12256 84800000;0;174 utlization;rack_1/BladeEnclosure_2/Node_20;1225699200000;0; 172 175 utlization;rack_1/BladeEnclosure_2/Node_20;1225706400000;0; 173 mean: 0. 36363636363636365176 mean: 0.7272727272727273 174 177 utlization;rack_1/BladeEnclosure_2/Node_21;1225666800000;0; 175 178 utlization;rack_1/BladeEnclosure_2/Node_21;1225670400000;1; 176 179 utlization;rack_1/BladeEnclosure_2/Node_21;1225677600000;1; 177 utlization;rack_1/BladeEnclosure_2/Node_21;1225699200000;0;178 180 utlization;rack_1/BladeEnclosure_2/Node_21;1225706400000;0; 179 mean: 0. 7272727272727273181 mean: 0.9090909090909092 180 182 utlization;rack_1/BladeEnclosure_2/Node_22;1225666800000;0; 181 183 utlization;rack_1/BladeEnclosure_2/Node_22;1225670400000;1; … … 191 193 utlization;rack_1/BladeEnclosure_2/Node_24;1225670400000;1; 192 194 utlization;rack_1/BladeEnclosure_2/Node_24;1225677600000;1; 195 utlization;rack_1/BladeEnclosure_2/Node_24;1225684800000;0; 193 196 utlization;rack_1/BladeEnclosure_2/Node_24;1225706400000;0; 194 mean: 0. 9090909090909092197 mean: 0.36363636363636365 195 198 utlization;rack_1/BladeEnclosure_2/Node_25;1225666800000;0; 196 199 utlization;rack_1/BladeEnclosure_2/Node_25;1225670400000;1; … … 201 204 utlization;rack_1/BladeEnclosure_2/Node_26;1225666800000;0; 202 205 utlization;rack_1/BladeEnclosure_2/Node_26;1225675800000;1; 203 utlization;rack_1/BladeEnclosure_2/Node_26;122568 6600000;0;206 utlization;rack_1/BladeEnclosure_2/Node_26;1225683000000;0; 204 207 utlization;rack_1/BladeEnclosure_2/Node_26;1225706400000;0; 205 mean: 0. 2727272727272727208 mean: 0.18181818181818182 206 209 utlization;rack_1/BladeEnclosure_2/Node_27;1225666800000;0; 207 utlization;rack_1/BladeEnclosure_2/Node_27;122567 6400000;1;208 utlization;rack_1/BladeEnclosure_2/Node_27;12256 90800000;0;210 utlization;rack_1/BladeEnclosure_2/Node_27;1225675800000;1; 211 utlization;rack_1/BladeEnclosure_2/Node_27;1225686600000;0; 209 212 utlization;rack_1/BladeEnclosure_2/Node_27;1225706400000;0; 210 mean: 0. 36363636363636365213 mean: 0.2727272727272727 211 214 utlization;rack_1/BladeEnclosure_2/Node_28;1225666800000;0; 212 215 utlization;rack_1/BladeEnclosure_2/Node_28;1225676400000;1; … … 215 218 mean: 0.36363636363636365 216 219 utlization;rack_1/BladeEnclosure_3/Node_29;1225666800000;0; 217 utlization;rack_1/BladeEnclosure_3/Node_29;122567 8400000;1;218 utlization;rack_1/BladeEnclosure_3/Node_29;1225 703600000;0;220 utlization;rack_1/BladeEnclosure_3/Node_29;1225676400000;1; 221 utlization;rack_1/BladeEnclosure_3/Node_29;1225690800000;0; 219 222 utlization;rack_1/BladeEnclosure_3/Node_29;1225706400000;0; 220 mean: 0. 6363636363636364223 mean: 0.36363636363636365 221 224 utlization;rack_1/BladeEnclosure_3/Node_30;1225666800000;0; 222 225 utlization;rack_1/BladeEnclosure_3/Node_30;1225678400000;1; 223 utlization;rack_1/BladeEnclosure_3/Node_30;1225 692800000;0;226 utlization;rack_1/BladeEnclosure_3/Node_30;1225703600000;0; 224 227 utlization;rack_1/BladeEnclosure_3/Node_30;1225706400000;0; 225 mean: 0. 36363636363636365228 mean: 0.6363636363636364 226 229 utlization;rack_1/BladeEnclosure_3/Node_31;1225666800000;0; 227 230 utlization;rack_1/BladeEnclosure_3/Node_31;1225678400000;1; 228 utlization;rack_1/BladeEnclosure_3/Node_31;12256 85600000;0;231 utlization;rack_1/BladeEnclosure_3/Node_31;1225692800000;0; 229 232 utlization;rack_1/BladeEnclosure_3/Node_31;1225706400000;0; 230 mean: 0. 18181818181818182233 mean: 0.36363636363636365 231 234 utlization;rack_1/BladeEnclosure_3/Node_32;1225666800000;0; 232 235 utlization;rack_1/BladeEnclosure_3/Node_32;1225678400000;1; 233 utlization;rack_1/BladeEnclosure_3/Node_32;1225 703600000;0;236 utlization;rack_1/BladeEnclosure_3/Node_32;1225685600000;0; 234 237 utlization;rack_1/BladeEnclosure_3/Node_32;1225706400000;0; 235 mean: 0. 6363636363636364238 mean: 0.18181818181818182 236 239 utlization;rack_1/BladeEnclosure_3/Node_33;1225666800000;0; 237 240 utlization;rack_1/BladeEnclosure_3/Node_33;1225678400000;1; 238 utlization;rack_1/BladeEnclosure_3/Node_33;1225 692800000;0;241 utlization;rack_1/BladeEnclosure_3/Node_33;1225703600000;0; 239 242 utlization;rack_1/BladeEnclosure_3/Node_33;1225706400000;0; 240 mean: 0. 36363636363636365243 mean: 0.6363636363636364 241 244 utlization;rack_1/BladeEnclosure_3/Node_34;1225666800000;0; 242 245 utlization;rack_1/BladeEnclosure_3/Node_34;1225678400000;1; 243 utlization;rack_1/BladeEnclosure_3/Node_34;12256 89200000;0;246 utlization;rack_1/BladeEnclosure_3/Node_34;1225692800000;0; 244 247 utlization;rack_1/BladeEnclosure_3/Node_34;1225706400000;0; 245 mean: 0. 2727272727272727248 mean: 0.36363636363636365 246 249 utlization;rack_1/BladeEnclosure_3/Node_35;1225666800000;0; 247 utlization;rack_1/BladeEnclosure_3/Node_35;122567 9000000;1;248 utlization;rack_1/BladeEnclosure_3/Node_35;1225 704200000;0;250 utlization;rack_1/BladeEnclosure_3/Node_35;1225678400000;1; 251 utlization;rack_1/BladeEnclosure_3/Node_35;1225689200000;0; 249 252 utlization;rack_1/BladeEnclosure_3/Node_35;1225706400000;0; 250 mean: 0. 6363636363636364253 mean: 0.2727272727272727 251 254 utlization;rack_1/BladeEnclosure_3/Node_36;1225666800000;0; 252 255 utlization;rack_1/BladeEnclosure_3/Node_36;1225679000000;1; 253 utlization;rack_1/BladeEnclosure_3/Node_36;1225 686200000;0;256 utlization;rack_1/BladeEnclosure_3/Node_36;1225704200000;0; 254 257 utlization;rack_1/BladeEnclosure_3/Node_36;1225706400000;0; 255 mean: 0. 18181818181818182258 mean: 0.6363636363636364 256 259 utlization;rack_1/BladeEnclosure_3/Node_37;1225666800000;0; 257 260 utlization;rack_1/BladeEnclosure_3/Node_37;1225679000000;1; 258 utlization;rack_1/BladeEnclosure_3/Node_37;122568 9800000;0;261 utlization;rack_1/BladeEnclosure_3/Node_37;1225686200000;0; 259 262 utlization;rack_1/BladeEnclosure_3/Node_37;1225706400000;0; 260 mean: 0. 2727272727272727263 mean: 0.18181818181818182 261 264 utlization;rack_1/BladeEnclosure_3/Node_38;1225666800000;0; 265 utlization;rack_1/BladeEnclosure_3/Node_38;1225679000000;1; 266 utlization;rack_1/BladeEnclosure_3/Node_38;1225689800000;0; 262 267 utlization;rack_1/BladeEnclosure_3/Node_38;1225706400000;0; 263 mean: 0. 0268 mean: 0.2727272727272727 264 269 utlization;rack_1/BladeEnclosure_3/Node_39;1225666800000;0; 265 270 utlization;rack_1/BladeEnclosure_3/Node_39;1225706400000;0; … … 498 503 utlization;rack_1/BladeEnclosure_1/Node_6/Processor_21;1225666800000;1; 499 504 utlization;rack_1/BladeEnclosure_1/Node_6/Processor_21;1225677600000;1; 500 utlization;rack_1/BladeEnclosure_1/Node_6/Processor_21;1225684800000;0;501 505 utlization;rack_1/BladeEnclosure_1/Node_6/Processor_21;1225706400000;0; 502 mean: 0.45454545454545453506 mean: 1.0 503 507 utlization;rack_1/BladeEnclosure_1/Node_6/Processor_22;1225666800000;1; 504 508 utlization;rack_1/BladeEnclosure_1/Node_6/Processor_22;1225677600000;1; 505 utlization;rack_1/BladeEnclosure_1/Node_6/Processor_22;1225684800000;0;506 509 utlization;rack_1/BladeEnclosure_1/Node_6/Processor_22;1225706400000;0; 507 mean: 0.45454545454545453510 mean: 1.0 508 511 utlization;rack_1/BladeEnclosure_1/Node_6/Processor_23;1225666800000;1; 509 512 utlization;rack_1/BladeEnclosure_1/Node_6/Processor_23;1225677600000;1; 510 utlization;rack_1/BladeEnclosure_1/Node_6/Processor_23;1225684800000;0;511 513 utlization;rack_1/BladeEnclosure_1/Node_6/Processor_23;1225706400000;0; 512 mean: 0.45454545454545453514 mean: 1.0 513 515 utlization;rack_1/BladeEnclosure_1/Node_6/Processor_24;1225666800000;1; 514 516 utlization;rack_1/BladeEnclosure_1/Node_6/Processor_24;1225677600000;1; 515 utlization;rack_1/BladeEnclosure_1/Node_6/Processor_24;1225684800000;0;516 517 utlization;rack_1/BladeEnclosure_1/Node_6/Processor_24;1225706400000;0; 517 mean: 0.45454545454545453518 mean: 1.0 518 519 utlization;rack_1/BladeEnclosure_1/Node_7/Processor_25;1225666800000;1; 519 520 utlization;rack_1/BladeEnclosure_1/Node_7/Processor_25;1225681200000;0; … … 551 552 utlization;rack_1/BladeEnclosure_1/Node_9/Processor_33;1225674000000;0; 552 553 utlization;rack_1/BladeEnclosure_1/Node_9/Processor_33;1225675800000;1; 553 utlization;rack_1/BladeEnclosure_1/Node_9/Processor_33;122568 6600000;0;554 utlization;rack_1/BladeEnclosure_1/Node_9/Processor_33;1225683000000;0; 554 555 utlization;rack_1/BladeEnclosure_1/Node_9/Processor_33;1225706400000;0; 555 mean: 0. 45454545454545453556 mean: 0.36363636363636365 556 557 utlization;rack_1/BladeEnclosure_1/Node_9/Processor_34;1225666800000;1; 557 558 utlization;rack_1/BladeEnclosure_1/Node_9/Processor_34;1225674000000;0; 558 559 utlization;rack_1/BladeEnclosure_1/Node_9/Processor_34;1225675800000;1; 559 utlization;rack_1/BladeEnclosure_1/Node_9/Processor_34;122568 6600000;0;560 utlization;rack_1/BladeEnclosure_1/Node_9/Processor_34;1225683000000;0; 560 561 utlization;rack_1/BladeEnclosure_1/Node_9/Processor_34;1225706400000;0; 561 mean: 0. 45454545454545453562 mean: 0.36363636363636365 562 563 utlization;rack_1/BladeEnclosure_1/Node_9/Processor_35;1225666800000;1; 563 564 utlization;rack_1/BladeEnclosure_1/Node_9/Processor_35;1225674000000;0; 564 565 utlization;rack_1/BladeEnclosure_1/Node_9/Processor_35;1225675800000;1; 565 utlization;rack_1/BladeEnclosure_1/Node_9/Processor_35;122568 6600000;0;566 utlization;rack_1/BladeEnclosure_1/Node_9/Processor_35;1225683000000;0; 566 567 utlization;rack_1/BladeEnclosure_1/Node_9/Processor_35;1225706400000;0; 567 mean: 0. 45454545454545453568 mean: 0.36363636363636365 568 569 utlization;rack_1/BladeEnclosure_1/Node_9/Processor_36;1225666800000;1; 569 570 utlization;rack_1/BladeEnclosure_1/Node_9/Processor_36;1225674000000;0; 570 571 utlization;rack_1/BladeEnclosure_1/Node_9/Processor_36;1225675800000;1; 571 utlization;rack_1/BladeEnclosure_1/Node_9/Processor_36;122568 6600000;0;572 utlization;rack_1/BladeEnclosure_1/Node_9/Processor_36;1225683000000;0; 572 573 utlization;rack_1/BladeEnclosure_1/Node_9/Processor_36;1225706400000;0; 573 mean: 0. 45454545454545453574 mean: 0.36363636363636365 574 575 utlization;rack_1/BladeEnclosure_1/Node_10/Processor_37;1225666800000;1; 575 576 utlization;rack_1/BladeEnclosure_1/Node_10/Processor_37;1225677600000;1; 577 utlization;rack_1/BladeEnclosure_1/Node_10/Processor_37;1225684800000;0; 576 578 utlization;rack_1/BladeEnclosure_1/Node_10/Processor_37;1225706400000;0; 577 mean: 1.0579 mean: 0.45454545454545453 578 580 utlization;rack_1/BladeEnclosure_1/Node_10/Processor_38;1225666800000;1; 579 581 utlization;rack_1/BladeEnclosure_1/Node_10/Processor_38;1225677600000;1; 582 utlization;rack_1/BladeEnclosure_1/Node_10/Processor_38;1225684800000;0; 580 583 utlization;rack_1/BladeEnclosure_1/Node_10/Processor_38;1225706400000;0; 581 mean: 1.0584 mean: 0.45454545454545453 582 585 utlization;rack_1/BladeEnclosure_1/Node_10/Processor_39;1225666800000;1; 583 586 utlization;rack_1/BladeEnclosure_1/Node_10/Processor_39;1225677600000;1; 587 utlization;rack_1/BladeEnclosure_1/Node_10/Processor_39;1225684800000;0; 584 588 utlization;rack_1/BladeEnclosure_1/Node_10/Processor_39;1225706400000;0; 585 mean: 1.0589 mean: 0.45454545454545453 586 590 utlization;rack_1/BladeEnclosure_1/Node_10/Processor_40;1225666800000;1; 587 591 utlization;rack_1/BladeEnclosure_1/Node_10/Processor_40;1225677600000;1; 592 utlization;rack_1/BladeEnclosure_1/Node_10/Processor_40;1225684800000;0; 588 593 utlization;rack_1/BladeEnclosure_1/Node_10/Processor_40;1225706400000;0; 589 mean: 1.0594 mean: 0.45454545454545453 590 595 utlization;rack_1/BladeEnclosure_1/Node_11/Processor_41;1225666800000;1; 591 596 utlization;rack_1/BladeEnclosure_1/Node_11/Processor_41;1225681200000;0; … … 623 628 utlization;rack_1/BladeEnclosure_1/Node_13/Processor_49;1225674000000;0; 624 629 utlization;rack_1/BladeEnclosure_1/Node_13/Processor_49;1225675800000;1; 625 utlization;rack_1/BladeEnclosure_1/Node_13/Processor_49;122568 3000000;0;630 utlization;rack_1/BladeEnclosure_1/Node_13/Processor_49;1225686600000;0; 626 631 utlization;rack_1/BladeEnclosure_1/Node_13/Processor_49;1225706400000;0; 627 mean: 0. 36363636363636365632 mean: 0.45454545454545453 628 633 utlization;rack_1/BladeEnclosure_1/Node_13/Processor_50;1225666800000;1; 629 634 utlization;rack_1/BladeEnclosure_1/Node_13/Processor_50;1225674000000;0; 630 635 utlization;rack_1/BladeEnclosure_1/Node_13/Processor_50;1225675800000;1; 631 utlization;rack_1/BladeEnclosure_1/Node_13/Processor_50;122568 3000000;0;636 utlization;rack_1/BladeEnclosure_1/Node_13/Processor_50;1225686600000;0; 632 637 utlization;rack_1/BladeEnclosure_1/Node_13/Processor_50;1225706400000;0; 633 mean: 0. 36363636363636365638 mean: 0.45454545454545453 634 639 utlization;rack_1/BladeEnclosure_1/Node_13/Processor_51;1225666800000;1; 635 640 utlization;rack_1/BladeEnclosure_1/Node_13/Processor_51;1225674000000;0; 636 641 utlization;rack_1/BladeEnclosure_1/Node_13/Processor_51;1225675800000;1; 637 utlization;rack_1/BladeEnclosure_1/Node_13/Processor_51;122568 3000000;0;642 utlization;rack_1/BladeEnclosure_1/Node_13/Processor_51;1225686600000;0; 638 643 utlization;rack_1/BladeEnclosure_1/Node_13/Processor_51;1225706400000;0; 639 mean: 0. 36363636363636365644 mean: 0.45454545454545453 640 645 utlization;rack_1/BladeEnclosure_1/Node_13/Processor_52;1225666800000;1; 641 646 utlization;rack_1/BladeEnclosure_1/Node_13/Processor_52;1225674000000;0; 642 647 utlization;rack_1/BladeEnclosure_1/Node_13/Processor_52;1225675800000;1; 643 utlization;rack_1/BladeEnclosure_1/Node_13/Processor_52;122568 3000000;0;648 utlization;rack_1/BladeEnclosure_1/Node_13/Processor_52;1225686600000;0; 644 649 utlization;rack_1/BladeEnclosure_1/Node_13/Processor_52;1225706400000;0; 645 mean: 0. 36363636363636365650 mean: 0.45454545454545453 646 651 utlization;rack_1/BladeEnclosure_1/Node_14/Processor_53;1225666800000;0; 647 652 utlization;rack_1/BladeEnclosure_1/Node_14/Processor_53;1225668600000;1; … … 767 772 utlization;rack_1/BladeEnclosure_2/Node_20/Processor_77;1225670400000;1; 768 773 utlization;rack_1/BladeEnclosure_2/Node_20/Processor_77;1225677600000;1; 769 utlization;rack_1/BladeEnclosure_2/Node_20/Processor_77;12256 84800000;0;774 utlization;rack_1/BladeEnclosure_2/Node_20/Processor_77;1225699200000;0; 770 775 utlization;rack_1/BladeEnclosure_2/Node_20/Processor_77;1225706400000;0; 771 mean: 0. 36363636363636365776 mean: 0.7272727272727273 772 777 utlization;rack_1/BladeEnclosure_2/Node_20/Processor_78;1225666800000;0; 773 778 utlization;rack_1/BladeEnclosure_2/Node_20/Processor_78;1225670400000;1; 774 779 utlization;rack_1/BladeEnclosure_2/Node_20/Processor_78;1225677600000;1; 775 utlization;rack_1/BladeEnclosure_2/Node_20/Processor_78;12256 84800000;0;780 utlization;rack_1/BladeEnclosure_2/Node_20/Processor_78;1225699200000;0; 776 781 utlization;rack_1/BladeEnclosure_2/Node_20/Processor_78;1225706400000;0; 777 mean: 0. 36363636363636365782 mean: 0.7272727272727273 778 783 utlization;rack_1/BladeEnclosure_2/Node_20/Processor_79;1225666800000;0; 779 784 utlization;rack_1/BladeEnclosure_2/Node_20/Processor_79;1225670400000;1; 780 785 utlization;rack_1/BladeEnclosure_2/Node_20/Processor_79;1225677600000;1; 781 utlization;rack_1/BladeEnclosure_2/Node_20/Processor_79;12256 84800000;0;786 utlization;rack_1/BladeEnclosure_2/Node_20/Processor_79;1225699200000;0; 782 787 utlization;rack_1/BladeEnclosure_2/Node_20/Processor_79;1225706400000;0; 783 mean: 0. 36363636363636365788 mean: 0.7272727272727273 784 789 utlization;rack_1/BladeEnclosure_2/Node_20/Processor_80;1225666800000;0; 785 790 utlization;rack_1/BladeEnclosure_2/Node_20/Processor_80;1225670400000;1; 786 791 utlization;rack_1/BladeEnclosure_2/Node_20/Processor_80;1225677600000;1; 787 utlization;rack_1/BladeEnclosure_2/Node_20/Processor_80;12256 84800000;0;792 utlization;rack_1/BladeEnclosure_2/Node_20/Processor_80;1225699200000;0; 788 793 utlization;rack_1/BladeEnclosure_2/Node_20/Processor_80;1225706400000;0; 789 mean: 0. 36363636363636365794 mean: 0.7272727272727273 790 795 utlization;rack_1/BladeEnclosure_2/Node_21/Processor_81;1225666800000;0; 791 796 utlization;rack_1/BladeEnclosure_2/Node_21/Processor_81;1225670400000;1; 792 797 utlization;rack_1/BladeEnclosure_2/Node_21/Processor_81;1225677600000;1; 793 utlization;rack_1/BladeEnclosure_2/Node_21/Processor_81;1225699200000;0;794 798 utlization;rack_1/BladeEnclosure_2/Node_21/Processor_81;1225706400000;0; 795 mean: 0. 7272727272727273799 mean: 0.9090909090909092 796 800 utlization;rack_1/BladeEnclosure_2/Node_21/Processor_82;1225666800000;0; 797 801 utlization;rack_1/BladeEnclosure_2/Node_21/Processor_82;1225670400000;1; 798 802 utlization;rack_1/BladeEnclosure_2/Node_21/Processor_82;1225677600000;1; 799 utlization;rack_1/BladeEnclosure_2/Node_21/Processor_82;1225699200000;0;800 803 utlization;rack_1/BladeEnclosure_2/Node_21/Processor_82;1225706400000;0; 801 mean: 0. 7272727272727273804 mean: 0.9090909090909092 802 805 utlization;rack_1/BladeEnclosure_2/Node_21/Processor_83;1225666800000;0; 803 806 utlization;rack_1/BladeEnclosure_2/Node_21/Processor_83;1225670400000;1; 804 807 utlization;rack_1/BladeEnclosure_2/Node_21/Processor_83;1225677600000;1; 805 utlization;rack_1/BladeEnclosure_2/Node_21/Processor_83;1225699200000;0;806 808 utlization;rack_1/BladeEnclosure_2/Node_21/Processor_83;1225706400000;0; 807 mean: 0. 7272727272727273809 mean: 0.9090909090909092 808 810 utlization;rack_1/BladeEnclosure_2/Node_21/Processor_84;1225666800000;0; 809 811 utlization;rack_1/BladeEnclosure_2/Node_21/Processor_84;1225670400000;1; 810 812 utlization;rack_1/BladeEnclosure_2/Node_21/Processor_84;1225677600000;1; 811 utlization;rack_1/BladeEnclosure_2/Node_21/Processor_84;1225699200000;0;812 813 utlization;rack_1/BladeEnclosure_2/Node_21/Processor_84;1225706400000;0; 813 mean: 0. 7272727272727273814 mean: 0.9090909090909092 814 815 utlization;rack_1/BladeEnclosure_2/Node_22/Processor_85;1225666800000;0; 815 816 utlization;rack_1/BladeEnclosure_2/Node_22/Processor_85;1225670400000;1; … … 855 856 utlization;rack_1/BladeEnclosure_2/Node_24/Processor_93;1225670400000;1; 856 857 utlization;rack_1/BladeEnclosure_2/Node_24/Processor_93;1225677600000;1; 858 utlization;rack_1/BladeEnclosure_2/Node_24/Processor_93;1225684800000;0; 857 859 utlization;rack_1/BladeEnclosure_2/Node_24/Processor_93;1225706400000;0; 858 mean: 0. 9090909090909092860 mean: 0.36363636363636365 859 861 utlization;rack_1/BladeEnclosure_2/Node_24/Processor_94;1225666800000;0; 860 862 utlization;rack_1/BladeEnclosure_2/Node_24/Processor_94;1225670400000;1; 861 863 utlization;rack_1/BladeEnclosure_2/Node_24/Processor_94;1225677600000;1; 864 utlization;rack_1/BladeEnclosure_2/Node_24/Processor_94;1225684800000;0; 862 865 utlization;rack_1/BladeEnclosure_2/Node_24/Processor_94;1225706400000;0; 863 mean: 0. 9090909090909092866 mean: 0.36363636363636365 864 867 utlization;rack_1/BladeEnclosure_2/Node_24/Processor_95;1225666800000;0; 865 868 utlization;rack_1/BladeEnclosure_2/Node_24/Processor_95;1225670400000;1; 866 869 utlization;rack_1/BladeEnclosure_2/Node_24/Processor_95;1225677600000;1; 870 utlization;rack_1/BladeEnclosure_2/Node_24/Processor_95;1225684800000;0; 867 871 utlization;rack_1/BladeEnclosure_2/Node_24/Processor_95;1225706400000;0; 868 mean: 0. 9090909090909092872 mean: 0.36363636363636365 869 873 utlization;rack_1/BladeEnclosure_2/Node_24/Processor_96;1225666800000;0; 870 874 utlization;rack_1/BladeEnclosure_2/Node_24/Processor_96;1225670400000;1; 871 875 utlization;rack_1/BladeEnclosure_2/Node_24/Processor_96;1225677600000;1; 876 utlization;rack_1/BladeEnclosure_2/Node_24/Processor_96;1225684800000;0; 872 877 utlization;rack_1/BladeEnclosure_2/Node_24/Processor_96;1225706400000;0; 873 mean: 0. 9090909090909092878 mean: 0.36363636363636365 874 879 utlization;rack_1/BladeEnclosure_2/Node_25/Processor_97;1225666800000;0; 875 880 utlization;rack_1/BladeEnclosure_2/Node_25/Processor_97;1225670400000;1; … … 898 903 utlization;rack_1/BladeEnclosure_2/Node_26/Processor_101;1225666800000;0; 899 904 utlization;rack_1/BladeEnclosure_2/Node_26/Processor_101;1225675800000;1; 900 utlization;rack_1/BladeEnclosure_2/Node_26/Processor_101;122568 6600000;0;905 utlization;rack_1/BladeEnclosure_2/Node_26/Processor_101;1225683000000;0; 901 906 utlization;rack_1/BladeEnclosure_2/Node_26/Processor_101;1225706400000;0; 902 mean: 0. 2727272727272727907 mean: 0.18181818181818182 903 908 utlization;rack_1/BladeEnclosure_2/Node_26/Processor_102;1225666800000;0; 904 909 utlization;rack_1/BladeEnclosure_2/Node_26/Processor_102;1225675800000;1; 905 utlization;rack_1/BladeEnclosure_2/Node_26/Processor_102;122568 6600000;0;910 utlization;rack_1/BladeEnclosure_2/Node_26/Processor_102;1225683000000;0; 906 911 utlization;rack_1/BladeEnclosure_2/Node_26/Processor_102;1225706400000;0; 907 mean: 0. 2727272727272727912 mean: 0.18181818181818182 908 913 utlization;rack_1/BladeEnclosure_2/Node_26/Processor_103;1225666800000;0; 909 914 utlization;rack_1/BladeEnclosure_2/Node_26/Processor_103;1225675800000;1; 910 utlization;rack_1/BladeEnclosure_2/Node_26/Processor_103;122568 6600000;0;915 utlization;rack_1/BladeEnclosure_2/Node_26/Processor_103;1225683000000;0; 911 916 utlization;rack_1/BladeEnclosure_2/Node_26/Processor_103;1225706400000;0; 912 mean: 0. 2727272727272727917 mean: 0.18181818181818182 913 918 utlization;rack_1/BladeEnclosure_2/Node_26/Processor_104;1225666800000;0; 914 919 utlization;rack_1/BladeEnclosure_2/Node_26/Processor_104;1225675800000;1; 915 utlization;rack_1/BladeEnclosure_2/Node_26/Processor_104;122568 6600000;0;920 utlization;rack_1/BladeEnclosure_2/Node_26/Processor_104;1225683000000;0; 916 921 utlization;rack_1/BladeEnclosure_2/Node_26/Processor_104;1225706400000;0; 917 mean: 0. 2727272727272727922 mean: 0.18181818181818182 918 923 utlization;rack_1/BladeEnclosure_2/Node_27/Processor_105;1225666800000;0; 919 utlization;rack_1/BladeEnclosure_2/Node_27/Processor_105;122567 6400000;1;920 utlization;rack_1/BladeEnclosure_2/Node_27/Processor_105;12256 90800000;0;924 utlization;rack_1/BladeEnclosure_2/Node_27/Processor_105;1225675800000;1; 925 utlization;rack_1/BladeEnclosure_2/Node_27/Processor_105;1225686600000;0; 921 926 utlization;rack_1/BladeEnclosure_2/Node_27/Processor_105;1225706400000;0; 922 mean: 0. 36363636363636365927 mean: 0.2727272727272727 923 928 utlization;rack_1/BladeEnclosure_2/Node_27/Processor_106;1225666800000;0; 924 utlization;rack_1/BladeEnclosure_2/Node_27/Processor_106;122567 6400000;1;925 utlization;rack_1/BladeEnclosure_2/Node_27/Processor_106;12256 90800000;0;929 utlization;rack_1/BladeEnclosure_2/Node_27/Processor_106;1225675800000;1; 930 utlization;rack_1/BladeEnclosure_2/Node_27/Processor_106;1225686600000;0; 926 931 utlization;rack_1/BladeEnclosure_2/Node_27/Processor_106;1225706400000;0; 927 mean: 0. 36363636363636365932 mean: 0.2727272727272727 928 933 utlization;rack_1/BladeEnclosure_2/Node_27/Processor_107;1225666800000;0; 929 utlization;rack_1/BladeEnclosure_2/Node_27/Processor_107;122567 6400000;1;930 utlization;rack_1/BladeEnclosure_2/Node_27/Processor_107;12256 90800000;0;934 utlization;rack_1/BladeEnclosure_2/Node_27/Processor_107;1225675800000;1; 935 utlization;rack_1/BladeEnclosure_2/Node_27/Processor_107;1225686600000;0; 931 936 utlization;rack_1/BladeEnclosure_2/Node_27/Processor_107;1225706400000;0; 932 mean: 0. 36363636363636365937 mean: 0.2727272727272727 933 938 utlization;rack_1/BladeEnclosure_2/Node_27/Processor_108;1225666800000;0; 934 utlization;rack_1/BladeEnclosure_2/Node_27/Processor_108;122567 6400000;1;935 utlization;rack_1/BladeEnclosure_2/Node_27/Processor_108;12256 90800000;0;939 utlization;rack_1/BladeEnclosure_2/Node_27/Processor_108;1225675800000;1; 940 utlization;rack_1/BladeEnclosure_2/Node_27/Processor_108;1225686600000;0; 936 941 utlization;rack_1/BladeEnclosure_2/Node_27/Processor_108;1225706400000;0; 937 mean: 0. 36363636363636365942 mean: 0.2727272727272727 938 943 utlization;rack_1/BladeEnclosure_2/Node_28/Processor_109;1225666800000;0; 939 944 utlization;rack_1/BladeEnclosure_2/Node_28/Processor_109;1225676400000;1; … … 957 962 mean: 0.36363636363636365 958 963 utlization;rack_1/BladeEnclosure_3/Node_29/Processor_113;1225666800000;0; 959 utlization;rack_1/BladeEnclosure_3/Node_29/Processor_113;122567 8400000;1;960 utlization;rack_1/BladeEnclosure_3/Node_29/Processor_113;1225 703600000;0;964 utlization;rack_1/BladeEnclosure_3/Node_29/Processor_113;1225676400000;1; 965 utlization;rack_1/BladeEnclosure_3/Node_29/Processor_113;1225690800000;0; 961 966 utlization;rack_1/BladeEnclosure_3/Node_29/Processor_113;1225706400000;0; 962 mean: 0. 6363636363636364967 mean: 0.36363636363636365 963 968 utlization;rack_1/BladeEnclosure_3/Node_29/Processor_114;1225666800000;0; 964 utlization;rack_1/BladeEnclosure_3/Node_29/Processor_114;122567 8400000;1;965 utlization;rack_1/BladeEnclosure_3/Node_29/Processor_114;1225 703600000;0;969 utlization;rack_1/BladeEnclosure_3/Node_29/Processor_114;1225676400000;1; 970 utlization;rack_1/BladeEnclosure_3/Node_29/Processor_114;1225690800000;0; 966 971 utlization;rack_1/BladeEnclosure_3/Node_29/Processor_114;1225706400000;0; 967 mean: 0. 6363636363636364972 mean: 0.36363636363636365 968 973 utlization;rack_1/BladeEnclosure_3/Node_29/Processor_115;1225666800000;0; 969 utlization;rack_1/BladeEnclosure_3/Node_29/Processor_115;122567 8400000;1;970 utlization;rack_1/BladeEnclosure_3/Node_29/Processor_115;1225 703600000;0;974 utlization;rack_1/BladeEnclosure_3/Node_29/Processor_115;1225676400000;1; 975 utlization;rack_1/BladeEnclosure_3/Node_29/Processor_115;1225690800000;0; 971 976 utlization;rack_1/BladeEnclosure_3/Node_29/Processor_115;1225706400000;0; 972 mean: 0. 6363636363636364977 mean: 0.36363636363636365 973 978 utlization;rack_1/BladeEnclosure_3/Node_29/Processor_116;1225666800000;0; 974 utlization;rack_1/BladeEnclosure_3/Node_29/Processor_116;122567 8400000;1;975 utlization;rack_1/BladeEnclosure_3/Node_29/Processor_116;1225 703600000;0;979 utlization;rack_1/BladeEnclosure_3/Node_29/Processor_116;1225676400000;1; 980 utlization;rack_1/BladeEnclosure_3/Node_29/Processor_116;1225690800000;0; 976 981 utlization;rack_1/BladeEnclosure_3/Node_29/Processor_116;1225706400000;0; 977 mean: 0. 6363636363636364982 mean: 0.36363636363636365 978 983 utlization;rack_1/BladeEnclosure_3/Node_30/Processor_117;1225666800000;0; 979 984 utlization;rack_1/BladeEnclosure_3/Node_30/Processor_117;1225678400000;1; 980 utlization;rack_1/BladeEnclosure_3/Node_30/Processor_117;1225 692800000;0;985 utlization;rack_1/BladeEnclosure_3/Node_30/Processor_117;1225703600000;0; 981 986 utlization;rack_1/BladeEnclosure_3/Node_30/Processor_117;1225706400000;0; 982 mean: 0. 36363636363636365987 mean: 0.6363636363636364 983 988 utlization;rack_1/BladeEnclosure_3/Node_30/Processor_118;1225666800000;0; 984 989 utlization;rack_1/BladeEnclosure_3/Node_30/Processor_118;1225678400000;1; 985 utlization;rack_1/BladeEnclosure_3/Node_30/Processor_118;1225 692800000;0;990 utlization;rack_1/BladeEnclosure_3/Node_30/Processor_118;1225703600000;0; 986 991 utlization;rack_1/BladeEnclosure_3/Node_30/Processor_118;1225706400000;0; 987 mean: 0. 36363636363636365992 mean: 0.6363636363636364 988 993 utlization;rack_1/BladeEnclosure_3/Node_30/Processor_119;1225666800000;0; 989 994 utlization;rack_1/BladeEnclosure_3/Node_30/Processor_119;1225678400000;1; 990 utlization;rack_1/BladeEnclosure_3/Node_30/Processor_119;1225 692800000;0;995 utlization;rack_1/BladeEnclosure_3/Node_30/Processor_119;1225703600000;0; 991 996 utlization;rack_1/BladeEnclosure_3/Node_30/Processor_119;1225706400000;0; 992 mean: 0. 36363636363636365997 mean: 0.6363636363636364 993 998 utlization;rack_1/BladeEnclosure_3/Node_30/Processor_120;1225666800000;0; 994 999 utlization;rack_1/BladeEnclosure_3/Node_30/Processor_120;1225678400000;1; 995 utlization;rack_1/BladeEnclosure_3/Node_30/Processor_120;1225 692800000;0;1000 utlization;rack_1/BladeEnclosure_3/Node_30/Processor_120;1225703600000;0; 996 1001 utlization;rack_1/BladeEnclosure_3/Node_30/Processor_120;1225706400000;0; 997 mean: 0. 363636363636363651002 mean: 0.6363636363636364 998 1003 utlization;rack_1/BladeEnclosure_3/Node_31/Processor_121;1225666800000;0; 999 1004 utlization;rack_1/BladeEnclosure_3/Node_31/Processor_121;1225678400000;1; 1000 utlization;rack_1/BladeEnclosure_3/Node_31/Processor_121;12256 85600000;0;1005 utlization;rack_1/BladeEnclosure_3/Node_31/Processor_121;1225692800000;0; 1001 1006 utlization;rack_1/BladeEnclosure_3/Node_31/Processor_121;1225706400000;0; 1002 mean: 0. 181818181818181821007 mean: 0.36363636363636365 1003 1008 utlization;rack_1/BladeEnclosure_3/Node_31/Processor_122;1225666800000;0; 1004 1009 utlization;rack_1/BladeEnclosure_3/Node_31/Processor_122;1225678400000;1; 1005 utlization;rack_1/BladeEnclosure_3/Node_31/Processor_122;12256 85600000;0;1010 utlization;rack_1/BladeEnclosure_3/Node_31/Processor_122;1225692800000;0; 1006 1011 utlization;rack_1/BladeEnclosure_3/Node_31/Processor_122;1225706400000;0; 1007 mean: 0. 181818181818181821012 mean: 0.36363636363636365 1008 1013 utlization;rack_1/BladeEnclosure_3/Node_31/Processor_123;1225666800000;0; 1009 1014 utlization;rack_1/BladeEnclosure_3/Node_31/Processor_123;1225678400000;1; 1010 utlization;rack_1/BladeEnclosure_3/Node_31/Processor_123;12256 85600000;0;1015 utlization;rack_1/BladeEnclosure_3/Node_31/Processor_123;1225692800000;0; 1011 1016 utlization;rack_1/BladeEnclosure_3/Node_31/Processor_123;1225706400000;0; 1012 mean: 0. 181818181818181821017 mean: 0.36363636363636365 1013 1018 utlization;rack_1/BladeEnclosure_3/Node_31/Processor_124;1225666800000;0; 1014 1019 utlization;rack_1/BladeEnclosure_3/Node_31/Processor_124;1225678400000;1; 1015 utlization;rack_1/BladeEnclosure_3/Node_31/Processor_124;12256 85600000;0;1020 utlization;rack_1/BladeEnclosure_3/Node_31/Processor_124;1225692800000;0; 1016 1021 utlization;rack_1/BladeEnclosure_3/Node_31/Processor_124;1225706400000;0; 1017 mean: 0. 181818181818181821022 mean: 0.36363636363636365 1018 1023 utlization;rack_1/BladeEnclosure_3/Node_32/Processor_125;1225666800000;0; 1019 1024 utlization;rack_1/BladeEnclosure_3/Node_32/Processor_125;1225678400000;1; 1020 utlization;rack_1/BladeEnclosure_3/Node_32/Processor_125;1225 703600000;0;1025 utlization;rack_1/BladeEnclosure_3/Node_32/Processor_125;1225685600000;0; 1021 1026 utlization;rack_1/BladeEnclosure_3/Node_32/Processor_125;1225706400000;0; 1022 mean: 0. 63636363636363641027 mean: 0.18181818181818182 1023 1028 utlization;rack_1/BladeEnclosure_3/Node_32/Processor_126;1225666800000;0; 1024 1029 utlization;rack_1/BladeEnclosure_3/Node_32/Processor_126;1225678400000;1; 1025 utlization;rack_1/BladeEnclosure_3/Node_32/Processor_126;1225 703600000;0;1030 utlization;rack_1/BladeEnclosure_3/Node_32/Processor_126;1225685600000;0; 1026 1031 utlization;rack_1/BladeEnclosure_3/Node_32/Processor_126;1225706400000;0; 1027 mean: 0. 63636363636363641032 mean: 0.18181818181818182 1028 1033 utlization;rack_1/BladeEnclosure_3/Node_32/Processor_127;1225666800000;0; 1029 1034 utlization;rack_1/BladeEnclosure_3/Node_32/Processor_127;1225678400000;1; 1030 utlization;rack_1/BladeEnclosure_3/Node_32/Processor_127;1225 703600000;0;1035 utlization;rack_1/BladeEnclosure_3/Node_32/Processor_127;1225685600000;0; 1031 1036 utlization;rack_1/BladeEnclosure_3/Node_32/Processor_127;1225706400000;0; 1032 mean: 0. 63636363636363641037 mean: 0.18181818181818182 1033 1038 utlization;rack_1/BladeEnclosure_3/Node_32/Processor_128;1225666800000;0; 1034 1039 utlization;rack_1/BladeEnclosure_3/Node_32/Processor_128;1225678400000;1; 1035 utlization;rack_1/BladeEnclosure_3/Node_32/Processor_128;1225 703600000;0;1040 utlization;rack_1/BladeEnclosure_3/Node_32/Processor_128;1225685600000;0; 1036 1041 utlization;rack_1/BladeEnclosure_3/Node_32/Processor_128;1225706400000;0; 1037 mean: 0. 63636363636363641042 mean: 0.18181818181818182 1038 1043 utlization;rack_1/BladeEnclosure_3/Node_33/Processor_129;1225666800000;0; 1039 1044 utlization;rack_1/BladeEnclosure_3/Node_33/Processor_129;1225678400000;1; 1040 utlization;rack_1/BladeEnclosure_3/Node_33/Processor_129;1225 692800000;0;1045 utlization;rack_1/BladeEnclosure_3/Node_33/Processor_129;1225703600000;0; 1041 1046 utlization;rack_1/BladeEnclosure_3/Node_33/Processor_129;1225706400000;0; 1042 mean: 0. 363636363636363651047 mean: 0.6363636363636364 1043 1048 utlization;rack_1/BladeEnclosure_3/Node_33/Processor_130;1225666800000;0; 1044 1049 utlization;rack_1/BladeEnclosure_3/Node_33/Processor_130;1225678400000;1; 1045 utlization;rack_1/BladeEnclosure_3/Node_33/Processor_130;1225 692800000;0;1050 utlization;rack_1/BladeEnclosure_3/Node_33/Processor_130;1225703600000;0; 1046 1051 utlization;rack_1/BladeEnclosure_3/Node_33/Processor_130;1225706400000;0; 1047 mean: 0. 363636363636363651052 mean: 0.6363636363636364 1048 1053 utlization;rack_1/BladeEnclosure_3/Node_33/Processor_131;1225666800000;0; 1049 1054 utlization;rack_1/BladeEnclosure_3/Node_33/Processor_131;1225678400000;1; 1050 utlization;rack_1/BladeEnclosure_3/Node_33/Processor_131;1225 692800000;0;1055 utlization;rack_1/BladeEnclosure_3/Node_33/Processor_131;1225703600000;0; 1051 1056 utlization;rack_1/BladeEnclosure_3/Node_33/Processor_131;1225706400000;0; 1052 mean: 0. 363636363636363651057 mean: 0.6363636363636364 1053 1058 utlization;rack_1/BladeEnclosure_3/Node_33/Processor_132;1225666800000;0; 1054 1059 utlization;rack_1/BladeEnclosure_3/Node_33/Processor_132;1225678400000;1; 1055 utlization;rack_1/BladeEnclosure_3/Node_33/Processor_132;1225 692800000;0;1060 utlization;rack_1/BladeEnclosure_3/Node_33/Processor_132;1225703600000;0; 1056 1061 utlization;rack_1/BladeEnclosure_3/Node_33/Processor_132;1225706400000;0; 1057 mean: 0. 363636363636363651062 mean: 0.6363636363636364 1058 1063 utlization;rack_1/BladeEnclosure_3/Node_34/Processor_133;1225666800000;0; 1059 1064 utlization;rack_1/BladeEnclosure_3/Node_34/Processor_133;1225678400000;1; 1060 utlization;rack_1/BladeEnclosure_3/Node_34/Processor_133;12256 89200000;0;1065 utlization;rack_1/BladeEnclosure_3/Node_34/Processor_133;1225692800000;0; 1061 1066 utlization;rack_1/BladeEnclosure_3/Node_34/Processor_133;1225706400000;0; 1062 mean: 0. 27272727272727271067 mean: 0.36363636363636365 1063 1068 utlization;rack_1/BladeEnclosure_3/Node_34/Processor_134;1225666800000;0; 1064 1069 utlization;rack_1/BladeEnclosure_3/Node_34/Processor_134;1225678400000;1; 1065 utlization;rack_1/BladeEnclosure_3/Node_34/Processor_134;12256 89200000;0;1070 utlization;rack_1/BladeEnclosure_3/Node_34/Processor_134;1225692800000;0; 1066 1071 utlization;rack_1/BladeEnclosure_3/Node_34/Processor_134;1225706400000;0; 1067 mean: 0. 27272727272727271072 mean: 0.36363636363636365 1068 1073 utlization;rack_1/BladeEnclosure_3/Node_34/Processor_135;1225666800000;0; 1069 1074 utlization;rack_1/BladeEnclosure_3/Node_34/Processor_135;1225678400000;1; 1070 utlization;rack_1/BladeEnclosure_3/Node_34/Processor_135;12256 89200000;0;1075 utlization;rack_1/BladeEnclosure_3/Node_34/Processor_135;1225692800000;0; 1071 1076 utlization;rack_1/BladeEnclosure_3/Node_34/Processor_135;1225706400000;0; 1072 mean: 0. 27272727272727271077 mean: 0.36363636363636365 1073 1078 utlization;rack_1/BladeEnclosure_3/Node_34/Processor_136;1225666800000;0; 1074 1079 utlization;rack_1/BladeEnclosure_3/Node_34/Processor_136;1225678400000;1; 1075 utlization;rack_1/BladeEnclosure_3/Node_34/Processor_136;12256 89200000;0;1080 utlization;rack_1/BladeEnclosure_3/Node_34/Processor_136;1225692800000;0; 1076 1081 utlization;rack_1/BladeEnclosure_3/Node_34/Processor_136;1225706400000;0; 1077 mean: 0. 27272727272727271082 mean: 0.36363636363636365 1078 1083 utlization;rack_1/BladeEnclosure_3/Node_35/Processor_137;1225666800000;0; 1079 utlization;rack_1/BladeEnclosure_3/Node_35/Processor_137;122567 9000000;1;1080 utlization;rack_1/BladeEnclosure_3/Node_35/Processor_137;1225 704200000;0;1084 utlization;rack_1/BladeEnclosure_3/Node_35/Processor_137;1225678400000;1; 1085 utlization;rack_1/BladeEnclosure_3/Node_35/Processor_137;1225689200000;0; 1081 1086 utlization;rack_1/BladeEnclosure_3/Node_35/Processor_137;1225706400000;0; 1082 mean: 0. 63636363636363641087 mean: 0.2727272727272727 1083 1088 utlization;rack_1/BladeEnclosure_3/Node_35/Processor_138;1225666800000;0; 1084 utlization;rack_1/BladeEnclosure_3/Node_35/Processor_138;122567 9000000;1;1085 utlization;rack_1/BladeEnclosure_3/Node_35/Processor_138;1225 704200000;0;1089 utlization;rack_1/BladeEnclosure_3/Node_35/Processor_138;1225678400000;1; 1090 utlization;rack_1/BladeEnclosure_3/Node_35/Processor_138;1225689200000;0; 1086 1091 utlization;rack_1/BladeEnclosure_3/Node_35/Processor_138;1225706400000;0; 1087 mean: 0. 63636363636363641092 mean: 0.2727272727272727 1088 1093 utlization;rack_1/BladeEnclosure_3/Node_35/Processor_139;1225666800000;0; 1089 utlization;rack_1/BladeEnclosure_3/Node_35/Processor_139;122567 9000000;1;1090 utlization;rack_1/BladeEnclosure_3/Node_35/Processor_139;1225 704200000;0;1094 utlization;rack_1/BladeEnclosure_3/Node_35/Processor_139;1225678400000;1; 1095 utlization;rack_1/BladeEnclosure_3/Node_35/Processor_139;1225689200000;0; 1091 1096 utlization;rack_1/BladeEnclosure_3/Node_35/Processor_139;1225706400000;0; 1092 mean: 0. 63636363636363641097 mean: 0.2727272727272727 1093 1098 utlization;rack_1/BladeEnclosure_3/Node_35/Processor_140;1225666800000;0; 1094 utlization;rack_1/BladeEnclosure_3/Node_35/Processor_140;122567 9000000;1;1095 utlization;rack_1/BladeEnclosure_3/Node_35/Processor_140;1225 704200000;0;1099 utlization;rack_1/BladeEnclosure_3/Node_35/Processor_140;1225678400000;1; 1100 utlization;rack_1/BladeEnclosure_3/Node_35/Processor_140;1225689200000;0; 1096 1101 utlization;rack_1/BladeEnclosure_3/Node_35/Processor_140;1225706400000;0; 1097 mean: 0. 63636363636363641102 mean: 0.2727272727272727 1098 1103 utlization;rack_1/BladeEnclosure_3/Node_36/Processor_141;1225666800000;0; 1099 1104 utlization;rack_1/BladeEnclosure_3/Node_36/Processor_141;1225679000000;1; 1100 utlization;rack_1/BladeEnclosure_3/Node_36/Processor_141;1225 686200000;0;1105 utlization;rack_1/BladeEnclosure_3/Node_36/Processor_141;1225704200000;0; 1101 1106 utlization;rack_1/BladeEnclosure_3/Node_36/Processor_141;1225706400000;0; 1102 mean: 0. 181818181818181821107 mean: 0.6363636363636364 1103 1108 utlization;rack_1/BladeEnclosure_3/Node_36/Processor_142;1225666800000;0; 1104 1109 utlization;rack_1/BladeEnclosure_3/Node_36/Processor_142;1225679000000;1; 1105 utlization;rack_1/BladeEnclosure_3/Node_36/Processor_142;1225 686200000;0;1110 utlization;rack_1/BladeEnclosure_3/Node_36/Processor_142;1225704200000;0; 1106 1111 utlization;rack_1/BladeEnclosure_3/Node_36/Processor_142;1225706400000;0; 1107 mean: 0. 181818181818181821112 mean: 0.6363636363636364 1108 1113 utlization;rack_1/BladeEnclosure_3/Node_36/Processor_143;1225666800000;0; 1109 1114 utlization;rack_1/BladeEnclosure_3/Node_36/Processor_143;1225679000000;1; 1110 utlization;rack_1/BladeEnclosure_3/Node_36/Processor_143;1225 686200000;0;1115 utlization;rack_1/BladeEnclosure_3/Node_36/Processor_143;1225704200000;0; 1111 1116 utlization;rack_1/BladeEnclosure_3/Node_36/Processor_143;1225706400000;0; 1112 mean: 0. 181818181818181821117 mean: 0.6363636363636364 1113 1118 utlization;rack_1/BladeEnclosure_3/Node_36/Processor_144;1225666800000;0; 1114 1119 utlization;rack_1/BladeEnclosure_3/Node_36/Processor_144;1225679000000;1; 1115 utlization;rack_1/BladeEnclosure_3/Node_36/Processor_144;1225 686200000;0;1120 utlization;rack_1/BladeEnclosure_3/Node_36/Processor_144;1225704200000;0; 1116 1121 utlization;rack_1/BladeEnclosure_3/Node_36/Processor_144;1225706400000;0; 1117 mean: 0. 181818181818181821122 mean: 0.6363636363636364 1118 1123 utlization;rack_1/BladeEnclosure_3/Node_37/Processor_145;1225666800000;0; 1119 1124 utlization;rack_1/BladeEnclosure_3/Node_37/Processor_145;1225679000000;1; 1120 utlization;rack_1/BladeEnclosure_3/Node_37/Processor_145;122568 9800000;0;1125 utlization;rack_1/BladeEnclosure_3/Node_37/Processor_145;1225686200000;0; 1121 1126 utlization;rack_1/BladeEnclosure_3/Node_37/Processor_145;1225706400000;0; 1122 mean: 0. 27272727272727271127 mean: 0.18181818181818182 1123 1128 utlization;rack_1/BladeEnclosure_3/Node_37/Processor_146;1225666800000;0; 1124 1129 utlization;rack_1/BladeEnclosure_3/Node_37/Processor_146;1225679000000;1; 1125 utlization;rack_1/BladeEnclosure_3/Node_37/Processor_146;122568 9800000;0;1130 utlization;rack_1/BladeEnclosure_3/Node_37/Processor_146;1225686200000;0; 1126 1131 utlization;rack_1/BladeEnclosure_3/Node_37/Processor_146;1225706400000;0; 1127 mean: 0. 27272727272727271132 mean: 0.18181818181818182 1128 1133 utlization;rack_1/BladeEnclosure_3/Node_37/Processor_147;1225666800000;0; 1129 1134 utlization;rack_1/BladeEnclosure_3/Node_37/Processor_147;1225679000000;1; 1130 utlization;rack_1/BladeEnclosure_3/Node_37/Processor_147;122568 9800000;0;1135 utlization;rack_1/BladeEnclosure_3/Node_37/Processor_147;1225686200000;0; 1131 1136 utlization;rack_1/BladeEnclosure_3/Node_37/Processor_147;1225706400000;0; 1132 mean: 0. 27272727272727271137 mean: 0.18181818181818182 1133 1138 utlization;rack_1/BladeEnclosure_3/Node_37/Processor_148;1225666800000;0; 1134 1139 utlization;rack_1/BladeEnclosure_3/Node_37/Processor_148;1225679000000;1; 1135 utlization;rack_1/BladeEnclosure_3/Node_37/Processor_148;122568 9800000;0;1140 utlization;rack_1/BladeEnclosure_3/Node_37/Processor_148;1225686200000;0; 1136 1141 utlization;rack_1/BladeEnclosure_3/Node_37/Processor_148;1225706400000;0; 1137 mean: 0. 27272727272727271142 mean: 0.18181818181818182 1138 1143 utlization;rack_1/BladeEnclosure_3/Node_38/Processor_149;1225666800000;0; 1144 utlization;rack_1/BladeEnclosure_3/Node_38/Processor_149;1225679000000;1; 1145 utlization;rack_1/BladeEnclosure_3/Node_38/Processor_149;1225689800000;0; 1139 1146 utlization;rack_1/BladeEnclosure_3/Node_38/Processor_149;1225706400000;0; 1140 mean: 0. 01147 mean: 0.2727272727272727 1141 1148 utlization;rack_1/BladeEnclosure_3/Node_38/Processor_150;1225666800000;0; 1149 utlization;rack_1/BladeEnclosure_3/Node_38/Processor_150;1225679000000;1; 1150 utlization;rack_1/BladeEnclosure_3/Node_38/Processor_150;1225689800000;0; 1142 1151 utlization;rack_1/BladeEnclosure_3/Node_38/Processor_150;1225706400000;0; 1143 mean: 0. 01152 mean: 0.2727272727272727 1144 1153 utlization;rack_1/BladeEnclosure_3/Node_38/Processor_151;1225666800000;0; 1154 utlization;rack_1/BladeEnclosure_3/Node_38/Processor_151;1225679000000;1; 1155 utlization;rack_1/BladeEnclosure_3/Node_38/Processor_151;1225689800000;0; 1145 1156 utlization;rack_1/BladeEnclosure_3/Node_38/Processor_151;1225706400000;0; 1146 mean: 0. 01157 mean: 0.2727272727272727 1147 1158 utlization;rack_1/BladeEnclosure_3/Node_38/Processor_152;1225666800000;0; 1159 utlization;rack_1/BladeEnclosure_3/Node_38/Processor_152;1225679000000;1; 1160 utlization;rack_1/BladeEnclosure_3/Node_38/Processor_152;1225689800000;0; 1148 1161 utlization;rack_1/BladeEnclosure_3/Node_38/Processor_152;1225706400000;0; 1149 mean: 0. 01162 mean: 0.2727272727272727 1150 1163 utlization;rack_1/BladeEnclosure_3/Node_39/Processor_153;1225666800000;0; 1151 1164 utlization;rack_1/BladeEnclosure_3/Node_39/Processor_153;1225706400000;0;
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